Computing devices are routinely used at work, at home, and everywhere else. Computing devices advantageously enable electronic communication, data sharing (e.g., documents, pictures, music, film, etc.), the use of application-specific software, and access to information for electronic commerce through the Internet and other computer networks.
The term computing device generally refers to desktop computers, laptop computers, mobile computing devices (e.g., personal digital assistants (PDAs), cell-phones, etc.), as well as any other type of computer system. A computing device typically includes a processor and a memory as well as other types of electronic devices.
In order to reduce the size of computing devices and electronic devices, more and more system functions are being integrated into a single chip through very large scale integration (VLSI) and power large scale integration (PLSI) designs. As more and more functions are integrated onto a single chip, chip sizes have generally increased. At the same time, there is a trend in the computer industry towards smaller package outlines (e.g., minimizing plastic packaging) with an emphasis on surface-mount packages.
These two trends inevitably lead to increased compressive stresses on the plastic package and on the chip itself. For example, the occurrence of cracks from die mounting, deformed metal, passivation cracks, and multi-layer oxide cracks has increased.
Many of these cracks are created by package-induced surface shear stresses. These stresses are most pronounced at chip corners in passivations over wide aluminum buses, in narrow polysilicon interconnects passing under the wide bus, and in the multi-level oxides along the edges of the buses. These stresses can lead to cracks and complete device failure.
Further, copper bond wires are now being substituted for gold bond wires in the semiconductor industry as cost saving measures for the next generation of very large scale integration (VLSI) and power large scale integration (PLSI) designs.
Thus, there is a need for a semiconductor die that can accommodate increased stress.